STATE TIMES NEWSKATRA: TEQIP-III sponsored One-Week Workshop on “Modeling & Simulation in Ultra Low Power VLSI Design” recently conducted at Shri Mata Vaishno Devi University (SMVDU), Katra. The workshop is organized by the School of Electronics & Communication Engineering, SMVDU. The key objective of the workshop was to provide an exposure to the faculty members/ research scholars/students in the field of Modeling & Simulation in Ultra Low Power VLSI Design to enhance their knowledge in the domain. The aim of the workshop was to provide the hands-on practice on available EDA tools with the School. The resource persons for the workshop were from the reputed institutes like IIT Delhi, IIT (BHU), NIT Hamirpur, and from the industry for providing and arranging the hands-on practice for the participants. The workshop coordinators, Dr. Vijay Kumar Sharma and Dr. Sachin Kumar Gupta expressed their gratitude to Vice Chancellor, SMVDU for his kind permission for organizing this workshop.
‘Marjaavaan’ release postponed to November 22
Doubted if I will ever act again: Suniel Shetty
Shilpa Shetty to be Punit Balana’s showstopper at LFW
‘Bhool Bhulaiyaa 2’ to hit screens on July 31, 2020
Religion and science don’t have to be divorced: Vidya Balan
© 2017 State Times Daily Newspaper